Progress has been made in technology for constructing a semiconductor structure (MOSFET, IGBT, diode, etc.) which functions as a semiconductor device on a semiconductor substrate in which a body region of a first conductive type (for example, p type) is disposed onto a surface of a drift region of a second conductive type (for example, n type). In a semiconductor device of this type, it is known that the withstand voltage of a semiconductor device is raised by forming a termination insulating region (termination area) which surrounds the cell area on the outer side of the range (cell area) where a semiconductor structure functioning as a MOSFET, IGBT, diode, or the like, is constructed.
Furthermore, a field plate structure is known as technology for raising the withstand voltage of the semiconductor device. In a general field plate structure, a conductor portion is formed on a surface of a semiconductor via an insulating film. By extending a depletion layer formed in the semiconductor and preventing the concentration of an electric field by adopting a field plate structure, it is possible to raise the withstand voltage of the semiconductor device.
Furthermore, an FLR (Field Limiting Ring) structure is known as separate technology for raising the withstand voltage of the semiconductor device. In an FLR structure, the FLR is formed in a ring shape on the outer side of the cell area. In a general FLR structure, the outer circumference portion of the cell area forms a drift region of a second conductive type. A structure is adopted in which a region of a first conductive type is formed by diffusion inside the drift region in the outer circumference portion. By using an FLR structure, it is possible to broaden the depletion layer, which extends from the circumference edge portion of the cell area, to the outer side of the FLR. Therefore, it is possible to prevent concentration of the electric field in the termination region of the cell area, which leads to decline in the withstand voltage characteristics of the semiconductor device.
The following patents have been disclosed in relation to the technology described above: Japanese Patent Application Publication No. 2001-15744, Japanese Patent Application Publication No. H11-307785, Japanese Patent Application Publication No. 2004-6723, Japanese Patent Application Publication No. H9-283754, and Japanese Patent Application Publication No. 2001-358338.